\ Publications

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Jenq-Kuen Lee




Ph.D., Indiana University

Professor,
Department of Computer Science, National Tsing-Hua University, Hsinchu, Taiwan

Research Interests: Optimizing compilers, Compilers for low-power, AI compilers, Computer architectures

Research Link: Google Scholar, DBLP

jklee@cs.nthu.edu.tw
Room.547, Tel:03-5715131 ext. 33519


Publications :

A. Journal Papers and Book Chapters

  1. The Support of MISRA C++ Analyzer for Reliability of Embedded Systems, Che-Chia Lin, Wei-Hsu Chu, Chia-Hsuan Chang, Hui-Hsin Liao, Chun-Chieh Yang, Jenq-Kuen Lee, Yi-Ping You, and Tien-Yuan Hsieh, ACM Transactions on Cyber-Physical Systems, Accepted.

  2. Accelerating AI Performance with the Incorporation of TVM and MediaTek NeuroPilot, Chao-Lin Lee, Chun-Ping Chung, Sheng-Yuan Cheng, Jenq-Kuen Lee, and Robert Lai, Connection Science, Accepted.

  3. Auto-Tuning Fixed-Point Precision with TVM on RISC-V Packed SIMD Extension, Chun-Chieh Yang, Yi-Ru Chen, Hui-Hsin Liao, Yuan-Ming Chang, and Jenq-Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Volume 28, Issue 3, Article No. 33, pp 1-21, May 2023.

  4. Accelerating AI Applications with Sparse Matrix Compression in Halide, Chao-Lin Lee, Chen-Ting Chao, Wei-Hsu Chu, Ming-Yu Hung and Jenq-Kuen Lee, Journal of Signal Processing Systems, 95, pp 609-622, May 2023.

  5. Efficient Realization of Decision Trees for Real-Time Inference, KUAN-HSUN CHEN, CHIAHUI SU, CHRISTIAN HAKERT, SEBASTIAN BUSCHJCGER, CHAO-LIN LEE, Jenq-Kuen Lee, KATHARINA MORIK, and JIAN-JIA CHEN, ACM Transactions on Embedded Computing Systems, Volume 21, Issue 6, pp 1-26, November 2022.

  6. Case Study: Design Strategies for Enabling Visual Application Blocks of Bluetooth Library, Tai-Liang Chen, I-An Su, and Jenq-Kuen Lee, IEEE Access, vol. 10, pp. 52630-52654, May 2022. (https://doi.org/10.1109/ACCESS.2022.3175316)

  7. Pointer-Based Divergence Analysis for OpenCL 2.0 Programs, Shao-Chung Wang, Lin-Ya Yu, Li-An Her, Yuan-Shin Hwang, and Jenq-Kuen Lee, ACM Transactions on Parallel Computing,Volume 8, Issue 4, Article No. 20, pp 1-23, December 2021.

  8. Support NNEF Execution Model for NNAPI, Yuan-Ming Chang, Chia-Yu Sung,Yu-Chien Sheu, Meng-Shiun Yu, Min-Yih Hsu, and Jenq-Kuen Lee, Journal of Supercomputing, 77, 10065-10096, Springer, 2021. (https://doi.org/10.1007/s11227-021-03625-7)

  9. NNBlocks: A Blockly Framework for AI Computing, Tai-Liang Chen, Yi-Ru Chen, Meng-Shiun Yu, and Jenq-Kuen Lee, Journal of Supercomputing, 77, 8622-8652, Springer, 2021. (https://doi.org/10.1007/s11227-021-03631-9)

  10. Experiment and Enabled Flow for GPGPU-Sim Simulators with Fixed-Point Instructions, Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Ming-Yu Hung, and Jenq-Kuen Lee, Journal of Systems Architecture, Elsevier, Volume 111, December 2020.

  11. Support OpenCL 2.0 Compiler on LLVM for PTX Simulators, Chun-Chieh Yang, Shao-Chung Wang, Min-Yi Hsu, Yuan-Ming Chang, Yuan-Shin Hwang, and Jenq-Kuen Lee, J Sign Process Syst, Springer, Volume 91, Issue 3-4, pp 261-271, March 2019.

  12. Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files, Shao-Chung Wang, Li-Chen Kan, Chao-Lin Lee, Yuan-Shin Hwang, and Jenq-Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Volume 23 Issue 2, November 2017.

  13. Enabling PoCL-based Runtime Frameworks on the HSA for OpenCL 2.0 Support, Yuan-Ming Chang, Shao-Chung Wang, Chun-Chieh Yang, Yuan-Shin Hwang, and Jenq-Kuen Lee, Journal of Systems Architecture, Volume 81, November 2017, Pages 71-82, Elsevier.

  14. Vector Data Flow Analysis for SIMD Optimizations on OpenCL Programs, Yu-Ter Lin and Jenq-Kuen Lee, Concurrency and Computation: Practice and Experience, Volume 28, Issue 5, pp. 1629-1654, April 2016. Wiley.

  15. Compilers for Low Power with Design Patterns on Embedded Multicore Systems, Cheng-Yen Lin, Chi-Bang Kuan, Wen-Li Shih, and Jenq-Kuen Lee, Journal of Signal Processing Systems, Volume 80, Issue 3, pp. 277-293, September 2015. (Springer)

  16. The Design and Experiments of a SID-Based Power Aware Simulator for Embedded Multi-Core Systems, Cheng-Yen Lin, Chung-Wen Huang, Chi-Band Kuan, Shi-Yu Huang, and Jenq-Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Volume 20 Issue 2, Feb 2015 (27 pages).

  17. C++ Support and Applications for Embedded Multicore DSP Systems, Chi-Bang Kuan, Jia-Jhe Li, Chung-Kai Chen, and Jenq-Kuen Lee, Journal of Signal Processing Systems, Volume 75, Issue 2, pp. 109-122, May 2015. (Springer)

  18. Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs, Wen-Li Shih, Yi-Ping You, Chung-Wen Huang, and Jenq-Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Volume 20, Issue 1, November 2014.

  19. Achieving spilling-friendly register file assignment for highly distributed register files, Chia-Han Lu, Wen-Li Shih, Chung-Ju Wu, and Jenq Kuen Lee, Journal of Supercomputing, Volume 69, Issue 3, pp. 1342-1362, Sep. 2014.

  20. Register Spilling via Transformed Interference Equations for PAC DSP Architecture, Jason Wu, C. H. Lu, and Jenq Kuen Lee, Concurrency and Computation: Practice and Experience, Volume 26, Issue 3, pages 779-799, 10 March 2014 (Wiley).

  21. Instruction Scheduling Methods and Phase Ordering Framework for VLIW DSP Processors with Distributed Register Files, Jason Wu, Yu-Ter Lin, and Jenq Kuen Lee, Journal of Supercomputing, Volume 61, Issue 3, pp. 1024-1047, Sep. 2012.

  22. Support of Probabilistic Pointer Analysis in the SSA Form, Ming-Yu Hung, Peng-Sheng Chen, Yuan-Shin Hwang, Roy Dz-Ching Ju, and Jenq Kuen Lee, IEEE Transactions on Parallel and Distributed Systems, Volume: 23, Issue: 12, Page(s): 2366 - 2379, Dec. 2012.

  23. Parallelization of Belief Propagation on Cell Processors for Stereo Vision, Kun-Yuan Hsieh, Chi-Hua Lai, Shang-Hong Lai, and Jenq Kuen Lee, ACM Transactions on Embedded Computing Systems, Volume 11S, Issue 1, Article No. 13, June 2012.

  24. Compiler Supports for VLIW DSP Processors with SIMD Intrinsics, Chi-Bang Kuan and Jenq Kuen Lee, Concurrency and Computation: Practice and Experience (Special Issue: Compilers for Parallel Computing), Volume 24, Issue 5, pages 517-532, April 10, 2012.

  25. Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools, Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq-Kuen Lee, Yuan-Hua Chu, An-Yeu Wu, Journal of Signal Processing Systems, Volume 62, Issue 3, pp 373-382, 2011, Springer.

  26. Case study: stereo vision experiments with multi-core software API on embedded MPSoC environments, Jia-Jhe Li, Chung-Kai Chen, Tung-Yu Wu and Jenq Kuen Lee, Journal of Supercomputing, 2011.

  27. Programming Model and Tools for Embedded Multicore Systems, Chung-Wen Huang, Wen-Li Shih, Chung-Ju Wu, Jia-Jhe Li, and Jenq Kuen Lee, Volume 4, Number 3-4/2010, Int. J. Embedded Systems, 2010.

  28. LC-GRFA: Global Register File Assignment with Local Consciousness for VLIW DSP Processors with Non-uniform Register Files, Chia-Han Lu, Young-Jia Lin, Yi-Ping You, and Jenq Kuen Lee, Concurrency and Computation: Practice and Experience, Volume 21, Issue 1, Pages 101-114, Wiley, January 2009.

  29. Case Study: Mobile Java RMI Support over Heterogeneous Wireless Networks , Chung-Kai Chen, Cheng-Wei Chen, Chien-Tan Ko, Jyh-Cheng Chen and Jenq Kuen Lee, Volume 28, Volume 68 , Issue 11, Pages 1425-1436, Journal of Parallel and Distributed Computing, 2008.

  30. Software Architecture Design for Streaming Java RMI, C. C. Yang, Chung-Kai Chen, Yu-Hao Chang, Jenq Kuen Lee, Volume 70 , Issue 2-3, Pages 168-184, Science of Computer Programming, Elsevier, 2008. [SCI Impact Factor 0.942 based on JCR 2004]

  31. Effective Code Generation for Distributed and Ping-Pong Register Files: a Case Study on PAC VLIW DSP Cores, Y. C. Lin, C. H. Lu, Jason Wu, C. L. Tang, Yi-Ping You, Y. Moo, Jenq Kuen Lee, Journal of VLSI Signal Processing Systems, Volume 51, Number 3, pp. 269-288, Springer, June 2008.

  32. Enhancing Microkernel Performance on VLIW DSP Processors via Multiset Context Switch, Kuen-Yuan Shieh, Young-Jia Lin, Chien-Ching Huang, Jenq Kuen Lee, Journal of VLSI Signal Processing Systems, Volume 51, Number 3, pp. 257-268, Springer, June 2008

  33. Compilation for Compact Power-Gating Controls, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Vol. 12, No. 4, Article 51, Sep. 2007. (26 pages)

  34. Energy-Aware Scheduling and Simulation Methodologies for Parallel Security Processors with Multiple Voltage Domains, Y. C. Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, Ting-Ting Hwang, Journal of Supercomputing, 42:(201-223), 2007, Springer.

  35. Enabling compiler flow for embedded VLIW DSP processors with distributed register files, Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq-Kuen Lee, ACM SIGPLAN Notices, Volume 42, Issue 7, Pages: 146 - 148, 2007. (ACM LCTES 2007 Issue)

  36. Switching Supports for Stateful Object Remoting on Network Processors, C. K. Chen, Y. H. Chang, Y. T. Chen, C. C. Yang, and Jenq Kuen Lee, Volume 40, Number 3, pp. 281-298, Journal of Supercomputing, 2007.

  37. PALF: Compiler Supports for Irregular Register Files in Clustered VLIW DSP Processors, Young-Jia Lin, Yi-Ping You, and Jenq Kuen Lee, Concurrency and Computation: Practice and Experience, 2007:19:1-16, Wiley, 2007.

  38. Compilers for Leakage Power Reductions, Yi-Ping You, Ching-Ren Lee, Jenq-Kuen Lee, ACM Transactions on Design Automation of Electronic Systems, Volume 11, Issue 1, pp. 147-166, Jan. 2006.

  39. Support and optimization of Java RMI over Bluetooth environments, P. C. Wey, J. S. Chen, C. W. Chen, Jenq Kuen Lee, Concurrency and Computation:Practice and Experience, 2005;17:967-989, Wiley, 2005. (Special Issue for Java Grande-ISCOPE 2002).

  40. Interprocedural Probabilistic Pointer Analysis, Peng-Sheng Chen, Yuan-Shin Hwang, Dz-Ching Ju, Jenq Kuen Lee, IEEE Transactions on Parallel and Distributed Systems, Volume 15, Issue 10, pp. 893-907, Oct. 2004.

  41. "Support and Optimization for Parallel Sparse Programs with Array Intrinsics of Fortran 90," Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee, Parallel Computing, Volume 30, Issue 4, Pages 527-550, April 2004.

  42. Case Study: An infrastructure for C/ATLAS environment with object-oriented design and XML representation, Cheng-Wei Chen, Jenq Kuen Lee, Journal of System and Software, Vol 71/1-2 pp 83-95, 2004, Elesvier.

  43. Compiler Support for Speculative Multithreading Architecture with Probabilistic Points-To Analysis, Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee, ACM SIGPLAN NOTICES, Vol 38, Issue 10, Oct. 2003.

  44. Compiler optimizations on VLIW instruction scheduling for low power, Ching-Ren Lee, Jenq-Kuen Lee, Ting-Ting Hwang, Shih-Chun Tsai, ACM Transactions on Design Automation of Electronic Systems, 8(2): 252-268 (2003).

  45. Segmented Alignment: An Enhanced Model to Align Data Parallel Programs of HPF, Gwan-Hwan Hwang, Cheng-Wei Chen, Jenq Kuen Lee and Dz-Ching R. Ju, Journal of Supercomputing, Vol 25, Issue 1, pp. 17-41, 2003.

  46. Parallel Sparse Supports for Array Intrinsic Functions of Fortran 90, Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee, Journal of Supercomputing,18, 305-339, 2001, Kluwer Academic Publisher.

  47. Array operation synthesis to optimize HPF programs on distributed memory machines, Gwan-Hwan Hwang, D. Ju, Jenq Kuen Lee, Journal of Parallel and Distributed Computing, 61, 467-500, 2001, Academic Press.

  48. Real-Time Gang Scheduling with Workload Models for Parallel Computers, Wei-Kuan Shih, Chung-Der Lin, Yar-Wen Chang, Jenq Kuen Lee, Journal of Information Science and Engineering, 16, 333-347, 2000.

  49. Communication Set Generations with CSD Calculus and Expression Re-writing Framework, Gwan-Hwan Hwang, Jenq Kuen Lee, Parallel Computing, 25, 1105-1130, 1999.

  50. A Function-Composition Approach to Synthesize Fortran 90 Array Operations, Gwan-Hwan Hwang, Jenq Kuen Lee, Dz-Ching Ju, Journal of Parallel and Distributed Computing, 54, 1-47, 1998.

  51. Toward Automatic Support of Parallel Sparse Computation in Java with Continuous Compilations, Rong-Guey Chang, Cheng-Wei Chen, Tyng-Ruey Chuang, Jenq Kuen Lee, Concurrency: Practice and Experiences, Vol. 9(11), 1101-1111 (Nov. 1997).

  52. Implementation of Vortex Filament Methods on Parallel Machines with Distributed Adaptive Data Structure, Y. L. Shieh, Jenq Kuen Lee, J. H. Tsai, C. A. Lin, ``International Journal of Numerical Methods in Fluids", VOL. 24, 939-951, 1997.

  53. Parallel Array Object I/O Support on Distributed Environments, Jenq Kuen Lee, Ing-Kuen Tsaur, San-Yih Hwang, Journal of Parallel and Distributed Computing, 40, 227-241, 1997.

  54. An Array Operation Synthesis Scheme to Optimize Fortran 90 Programs, Gwan-Hwan Hwang, Jenq Kuen Lee, and Dz-Ching Ju , ACM SIGPLAN Notices, August, 1995 (ACM PPoPP Issue).

  55. Y. L. Shie, Jenq Kuen Lee, C. A. Lin, C. H. Tsai, ``Computations of Three-Dimensionally Evolving Jets with Vortex Methods on Parallel Machines with Distributed Memory", in ``Parallel Computational Fluid Dynamics: New Algorithms and Applications'', A. Ecer et al. editors, Elsevier Science, 1995.

  56. Jenq Kuen Lee, Y Chen, C. A. Lin, M. Lu, ``Modelling Three-Dimensional Gas-Turbine-Combustor-Model Flow on Parallel Machines with Distributed Memory,'' in ``Parallel Computational Fluid Dynamics: New Trends and Advances'', A. Ecer et al. editors, Elsevier Science, 1995.

  57. Dennis Gannon and Jenq Kuen Lee, ``Object-Oriented Parallelism: PC++ Ideas and Experiments,'' BIT 24, 1(1992): 46-56, Japan.

  58. Dennis Gannon, Vincent Guarna, and Jenq Kuen Lee, ``Static Analysis and Runtime Support for Parallel Execution of C,'' in Languages and Compilers for Parallel Computing, David Gelernter, Alexandru Niclau and David Padau, editors, The MIT Press, pp. 254-274, 1990.

B. Referred Conference Papers

  1. Developing an LLVM Backend for VLIW RISC-V Vector Extension Architectures, Hao-Chun Chang, Jhih-Kuan Lin, Meng-Shiun Yu, Tai-Liang Chen, and Jenq-Kuen Lee, Euro LLVM, Vienna, Austria, April 2024 (Poster).

  2. SIMD Everywhere Optimization from ARM NEON to RISC-V Vector Extensions, Ju-Hung Li, Jhih-Kuan Lin, Yung-Cheng Su, Chi-Wei Chu, Lai-Tak Kuok, Hung-Ming Lai, Chao-Lin Lee, Jenq-Kuen Lee, RISC-V Summit, Santa Clara, USA, Nov. 2023. (Slides & talk)

  3. Support of Sparse Tensor Computing for MLIR HLS, Geng-Ming Liang, Chao-Lin Lee, Robert Lai and Jenq-Kuen Lee, ICPP EMS 2023, Salt Lake City, Aug. 7 - Aug. 10, 2023.

  4. Enhancing LLVM Optimizations for Linear Recurrence Programs on RVV, Hung-Ming Lai, Jenq-Kuen Lee and Yuan-Shin Hwang, ICPP EMS 2023, Salt Lake City, Aug. 7 - Aug. 10, 2023.

  5. Efficient Support of TVM Scan OP on RISC-V Vector Extension, Hung-Ming Lai, Chao-Lin Lee, and Jenq-Kuen Lee, TVMcon 2023, Seattle, March 15-17, 2023, (Virtual Conference, lightning talk and slides).

  6. Support QNN Dialect for TVM with MediaTek Neuron and Devise the Scheduler for Acceleration, Robert Lai, Sheng-Yuan Cheng, Chun-Ping Chung, Ming-Long Huang, and Jenq-Kuen Lee, TVMcon 2023, Seattle, March 15-17, 2023, (Virtual Conference, talk and slides).

  7. Register-Pressure Aware Predicator for Length Multiplier of RVV, Meng-Shiuan Shih, Hung-Ming Lai, Chao-Lin Lee, Chung-Kai Chen and Jenq-Kuen Lee, ICPP EMS 2022, Bordeaux, France, Aug. 29 - Sep. 1, 2022. (Virtual)

  8. Efficient Support of the Scan Vector Model for RISC-V Vector Extension, Hung-Ming Lai and Jenq-Kuen Lee, ICPP EMS 2022, Bordeaux, France, Aug. 29 - Sep. 1, 2022. (Virtual)

  9. Application Showcases for TVM with NeuroPilot on Mobile Devices, Sheng-Yuan Cheng, Chun-Ping Chung, Robert Lai, and Jenq-Kuen Lee, ICPP EMS 2022, Bordeaux, France, Aug. 29 - Sep. 1, 2022. (Virtual)

  10. The Support of MLIR HLS Adaptor for LLVM IR, Geng-Ming Liang, Chuan-Yue Yuan, Meng-Shiun Yu, Tai-Liang Chen, Kuan-Hsun Chen, and Jenq-Kuen Lee, ICPP EMS 2022, Bordeaux, France, Aug. 29 - Sep. 1, 2022. (Virtual)

  11. C++OpenCL4TVM: Support C++OpenCL Kernel for TVM NN Operators, Po-Yao Chang, Tai-Liang Chen, Yu-Tse Huang, Meng-Shiun Yu, Jenq-Kuen Lee, IWOCL 2022 (poster paper), 2022.

  12. Optimization with TVM Hybrid OP on RISC-V with P Extension, Chuan-Yue Yuan, Meng-Shiun Yu, Chao-Lin Lee, Chun-Chieh Yang, and Jenq-Kuen Lee, TVMcon 2021, Seattle, Dec. 15-17, 2021, (Virtual Conference, lightning talk and slides).

  13. Integrate TVM with Mediatek Neuropilot for Mobile Devices, Robert Lai, Chun-Ping Chung, Sheng-Yuan Cheng, and Jenq-Kuen Lee, TVMcon 2021, Seattle, Dec. 15-17, 2021, (Virtual Conference, lightning talk and slides).

  14. Sail Specification for RISC-V P-Extension, Chuanhua Chang, Chun-Ping Chung, Yu-Tse Huang, Chao-Lin Lee, Jenq-Kuen Lee, Yu-Wen Shao, Charlie Su, Chia-Hui Su, Bow-Yaw Wang, and Ti-Han Wu, RISC-V Summit, San Francisco, Dec 5-8, 2021. (Slides & talk)

  15. Accelerate Binarized Neural Network with Processing-in-Memory Enabled by RISC-V Custom Instructions, Che-Chia Lin, Chao-Lin Lee, Jenq-Kuen Lee, Howard Wang, and Ming-Yu Hung, ICPP EMS 2021, Chicago, Aug. 2021.

  16. Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM, Hui-Hsin Liao, Chao-Lin Lee, Jenq-Kuen Lee, Wei-Chih Lai, Ming-Yu Hung, and Chung-Wen Huang, ICPP EMS 2021, Chicago, Aug 2021.

  17. Enabling the Use of C++20 Unseq Execution Policy for OpenCL, Po-Yao Chang, Tai-Liang Chen, Jenq-Kuen Lee, IWOCL 2021 (poster paper), ACM ICPS, Article No. 22, April 27 - 29, 2021.

  18. Enable TVM QNN on RISC-V with Subword SIMD Computation, Jenq-Kuen Lee, Yi-Ru Chen, Chia-Hsuan Chang, HH Liao, Chao-Lin Lee, Chun-Chieh Yang, CC Lin, YM Chang, Chun-Ping Chung, and Ming-Han Yang, TVM and Deep Learning Compilation Conference, Seattle, Dec 2020, (Virtual Conference, lightning talk and slides).

  19. A Generic Method to Utilize Vendor-Specific AI Accelerator on Android Mobile for TVM, Ming-Yu Hung, Ming-Yi Lai, Chia-Yu Sung, Jenq-Kuen Lee, TVM and Deep Learning Compilation Conference, Seattle, Dec. 2020.

  20. Support TVM QNN Flow on RISC-V with SIMD Computation, Yi-Ru Chen, Chia-Hsuan Chang, Hui-Hsin Liao, CC Lin, Chao-Lin Lee, Yuan-Ming Chang, Chun-Chieh Yang, I-Wei Wu, Heng-Kuan Lee, Jenq-Kuen Lee, RISC-V Global Forum, Virtual, Sep 2020 (Lightning talk).

  21. Devise Sparse Compression Schedulers to Enhance FastText Methods, Chen-Ting Chao, Wei-Hsu Chu, Chao-Lin Lee, Jenq-Kuen Lee, Ming-Yu Hung, Hsiang-Wei Sung, ICPP EMS 2020, Edmonton, Aug. 2020.

  22. Enabling Android NNAPI Flow for TVM Runtime, Ming-Yi Lai, Chia-Yu Sung, Jenq-Kuen Lee, and Ming-Yu Hung, ICPP EMS 2020, Edmonton, Aug. 2020.

  23. Experiments and Optimizations for TVM on RISC-V Architectures with P Extension, Yi-Ru Chen, Hui-Hsin Liao, Chia-Hsuan Chang, Che-Chia Lin, Chao-Lin Lee, Yuan-Ming Chang, Chun-Chieh Yang, Jenq-Kuen Lee, VLSI-DAT, Hsinchu, Taiwan, Aug 2020 (Invited).

  24. Accelerating NNEF framework on OpenCL devices using clDNN, Meng-Shiun Yu, Tai-Liang Chen and Jenq-Kuen Lee, IWOCL 2020, Germany, May 2020 (poster paper).

  25. Experiments and AI Model Validations for Neo/TVM on RISC-V Architectures with SIMD, Allen Lu, Piyo Chen, Heng Lin, Chun-Chieh Yang, Ssu-Hsuan Lu, Yuan-Ming Chang, Shao-Chung Wang, Charlie Su, Chen-Ling Chou, Vin Sharma, and Jenq-Kuen Lee, RISC-V Summit, San Jose, Dec 2019 (Poster).

  26. Supporting TVM on RISC-V Architectures with SIMD Computations, Jenq-Kuen Lee, Chun-CHieh Yang, Allen Lu, Piyo Chen, Yuan-Ming Chang, CH Chang, Yi-Ru Chen, HH Liao, Chao-Lin Lee, Ssu-Hsuan Lu, and Shao-Chung Wang, TVM and Deep Learning Compiler Conference, Seattle, Dec 2019 (lightning talk and slides).

  27. Accelerate DNN Performance with Sparse Matrix Compression in Halide, Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Chung Wen Huang, and Ming-Yu Hung, ICPP EMS 2019, Kyoto, Aug. 2019.

  28. Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions, Heng Lin, Piyo Chen, Yuan-Shin Huang, and Jenq-Kuen Lee, ICPP EMS 2019, Kyoto, Aug. 2019.

  29. Sparse-Matrix Compression Primitives with OpenCL Framework to Support Halide, Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Chung Wen Huang, and Ming-Yu Hung, IWOCL 2019, Boston, May 2019.

  30. Case Study: Support OpenCL Complex Class for Baseband Computing, Chia-Hsuan Chang, Chun-Chieh Yang, Jenq-Kuen Lee, and Yung-Chia Lin, IWOCL 2019, Boston, May 2019 (poster paper).

  31. Splendid GVN: Partial Redundancy Elimination for Algebraic Simplification, Li-An Her and Jenq-Kuen Lee, Euro LLVM, Brussels, Belgium, April 2019. (Poster).

  32. Enabling TVM on RISC-V Architectures with SIMD Instructions, Allen Lu, Chao-Lin Lee, Yuan-Ming Chang, Piyo Chen, Hsiang-Wei Sung, Heng Lin, Shao-Chung Wang, and Jenq-Kuen Lee, RISC-V Forum, March 2019 (Oral presentation).

  33. Supporting TVM on RISC-V Architectures, Jenq-Kuen Lee, Allen Lu, Yuan-Ming Chang, Chao-Lin Lee, Piyo Chen, and Shao-Chung Wang, TVM and Deep Learning Compiler Conference, Seattle, Dec 2018 (lightning talk and slides).

  34. Graph Support and Scheduling for OpenCL on Heterogeneous Multi-core Systems, Shih-Huan Chien, Yuan-Ming Chang, Chun-Chieh Yang, Yuan-Shin Hwang, and Jenq-Kuen Lee, ICPP EMS 2018, Oregon, Aug. 2018.

  35. Enable the Flow for GPGPU-Sim Simulators with Fixed-Point Instructions, Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, and Jenq-Kuen Lee, ICPP EMS 2018, Oregon, Aug. 2018.

  36. OpenCL Vector Swizzling Optimization under LLVM Global Value Numbering, Li-An Her and Jenq-Kuen Lee, CPC 2018, Dublin, Ireland, April 2018.

  37. ViennaCL++: Enable TensorFlow/Eigen via ViennaCL with OpenCL C++ Flow, Tai-Liang Chen, Shih-Huan Chien, and Jenq-Kuen Lee, IWOCL, Oxford, UK, 2018 (Poster).

  38. Enabling Rust Flow and Framework for RISC-V Architectures, Heng Lin, Shao-Chung Wang, Jenq-Kuen Lee, RISC-V Workshop, Barcelona, 2018 (Poster).

  39. Hierarchical Read/Write Analysis for Pointer-Based OpenCL Programs on RRAM, Lin-Ya Yu and Shao-Chung Wang, Jenq-Kuen Lee ICPP EMS 2017, Bristol, UK, 2017.

  40. OpenCL 2.0 Compiler Adaptation on LLVM for PTX Simulators, Chun-Chieh Yang, Shao-Chung Wang, Min-Yi Hsu, Yuan-Ming Chang, Yuan-Shin Hwang and Jenq-Kuen Lee, ICPP EMS 2017, Bristol, UK, 2017.

  41. Analyzing OpenCL 2.0 Workloads Using a Heterogeneous CPU-GPU Simulator, Li Wang, Ren-Wei Tsai, Shao-Chung Wang, Kun-Chih Chen, Po-Han Wang, Hsiang-Yun Cheng, Yi-Chung Lee, Sheng-Jie Shu, Chun-Chieh Yang, Min-Yih Hsu, Li-Chen Kan, Chao-Lin Lee, Tzu-Chieh Yu, Rih-Ding Peng, Chia-Lin Yang, Yuan-Shin Hwang, Jenq-Kuen Lee, Shiao-Li Tsao, and Ming Ouhyoung, ISPASS 2017 (Poster).

  42. Hydra LLVM: Instruction Selections with Threads, Min-Yih Hsu and Jenq-Kuen Lee, Euro LLVM, Germany, 2017 (Poster).

  43. Probabilistic Framework for Compiler Optimization with Multithread Power-Gating Controls, Wen-Li Shih, Cheng-Yen Lin, Ming-Yu Hung and Jenq-Kuen Lee, ICPP PASA 2016, Philadelphia, USA, Aug. 2016.

  44. Energy Efficient Affine Register File for GPU Microarchitecture, Shao-Chung Wang, Li-Chen Kan, Yuan-Shin Hwang and Jenq-Kuen Lee, ICPP EMS 2016, Philadelphia, USA, Aug. 2016.

  45. OpenCV Optimization on Heterogeneous Multi-Core Systems for Gesture Recognition Applications, Xiang-Wei Sung, Yuan-Ming Chang and Jenq-Kuen Lee, ICPP EMS 2016, Philadelphia, USA, Aug. 2016.

  46. Scheduling Methods for OpenVX Programs on Heterogeneous Multi-Core Systems, Tzu-Hsiang Lin, Cheng-Yen Lin, Jenq-Kuen Lee, PDPTA 2015, July 2015, USA.

  47. The Support of an Experimental OpenCL Compiler on HSA Environments, Chun-Chieh Yang, Shao-Chung Wang, Chou-Chuan Chen, Jenq-Kuen Lee, PDPTA 2015, July 2015, USA.

  48. Optimized Memory Access Support for Data Layout Conversion on Heterogeneous Multi-core Systems, Chia-Chen Hsu, Cheng-Yen Lin, Shin-Kai Chen, Chih-Wei Liu and Jenq-Kuen Lee, ESTIMedia 2014 (ESWeek 2014).

  49. Compilers for Low Power with Design Patterns on Embedded Multicore Systems, Cheng-Yen Lin, Chi-Bang Kuan and Jenq-Kuen Lee, ICPP EMS 2013.

  50. Design of Vehicle Detection Methods With OpenCL Programming on Multi-Core Systems, Kai-Mao Cheng , Cheng-Yen Lin, Yu-Chun Chen, Te-Feng Su, Shang-Hong Lai and Jenq-Kuen Lee, ESTIMedia 2013 (ESWeek 2013).

  51. Pointer-Based Divergence Analysis in the SSA Form, Shao-Chung Wang, Ming-Yu Hung, Jenq-Kuen Lee, Yuan-Shin Hwang, Roy Dz-Ching Ju, CPC 2013, Lyon, July 2013.

  52. Enabling an OpenCL Compiler for Embedded Multicore DSP Systems, Jia-Jhe Li, Chi-Bang Kuan, Tung-Yu Wu and Jenq Kuen Lee, ICPP EMS 2012, Pittsburgh, USA, 2012.

  53. A Functional Approach to Optimize SIMD Computations of OpenCL Programs, Yu-Te Lin, Chi-Bang Kuan, Shao-Chung Wang, Jenq-Kuen Lee, CPC 2012, Padova, Italy, 2012.

  54. Support of Software Framework for Embedded Multi-core Systems with Android Environments, Yu-Hao Chang, Chi-Bang Kuan, Cheng-Yen Lin, Te-Feng Su, Chun-Ta Chen, Jyh-Shing Jang, Shang-Hong Lai and Jenq-kuen Lee, ESTIMedia 2011 (Invited Talk).

  55. Parallelization of a Bokeh Application on Embedded Multicore DSP Systems, Chi-Bang Kuan, Shao-Chung Wang, Wen-Li Shih, Kun-Hsien Tsai, Shang-Hong Lai and Jenq Kuen Lee, ESTIMedia 2011 (ESWeek 2011).

  56. Innovative System and Application Curriculum on Multicore Systems, Pangfeng Liu, Greg C. Lee, Jenq-Kuen Lee, and Cheng-Yen Lin, WESE 2011 (ESWeek 2011).

  57. C++ Compiler Supports for Embedded Multicore DSP Systems, Chi-Bang Kuan, Jia-Jhe Li, Chung-Kai Chen and Jenq Kuen Lee, ICPP-EMS 2011.

  58. Enable OpenCL Compiler with Open64 Infrastructures, Yu-Te Lin, Shao-Chung Wang, Wen-Li Shih, Kun-Yuan Brian Shieh, Jenq-Kuen Lee, EMCA 2011, Canada, 2011.

  59. OpenCL Update, Yu-Te Lin, Shao-Chung Wang, Ming-Yu Hung, Jia-Jhe Li, Jenq-Kuen Lee, The 2011 Open64 Developers Forum, HP Campus Cupertino, CA, USA, June 2011.

  60. Power Aware SID-based Simulator for Embedded Multicore DSP Subsystems, Cheng-Yen Lin, Po-Yu Chen, Chun-Kai Tseng, Chung-Wen Huang, Chia-Chieh Weng, Chi-Bang Kuan, Shih-Han Lin, Shi-Yu Huang and Jenq-Kuen Lee, CODES+ISSS 2010, Scottsdale, Arizona, 2010 (ESWeek 2010).

  61. Support of Android Lab Modules for Embedded System Curriculum, Meng-Ting Wang, Po-Chun Huang, Jenq-Kuen Lee, Shang-Hong Lai, Roger Jang, Chun-Fa Chang, Chih-Wei Liu, Tei-Wei Kuo, and Shih-Wei Liao, WESE 2010, Scottsdale, Arizona, 2010 (ESWeek 2010).

  62. OpenCL Compiler Support Based on Open64 for MPUs+GPUs, Yu-Te Lin, Chung-Ju Wu, Chia-Han Lu, Shao-Chung Wang, and Jenq-Kuen Lee, The 2010 Open64 Developers Forum, HP Campus Cupertino, CA, USA, August 25, 2010.

  63. SIMD Intrinsic Supports for VLIW DSP Processors with Distributed Register Files, Chi-Bang Kuan and Jenq-Kuen Lee, CPC 2010, Vienna, July 2010.

  64. A Multi-Core Software API for Embedded MPSoC Environments, Jia-Jer Li, Shao-Chung Wang, Po-Chun Hsu, Po-Yu Chen, and Jenq Kuen Lee, Methods and Tools of Parallel Programming Multicomputers (MTPP 2010), Russia-Taiwan Symposium (Also in LNCS 6083).

  65. Configurable SID-based Multi-core Simulators for Embedded System Education, Chung-Wen Huang, Wei-Kuan Shih, Yarsun Hsu, Jenq-Kuen Lee, WESE 2009 (ESWeek 2009), Grenoble, France, 2009.

  66. Software Cache Support and API Design for Embedded DSP Processor, Cheng-Yen Lin, Shao-Chung Wang, Ming-Yu Hung, Kun-Yuan Hsieh, Jenq-Kuen Lee, International SoC Design Conference, Nov. 22-24, 2009. (Invited Paper)

  67. Support of Paged Register Files for Improving Context Switching on Embedded Processors, Chung-Wen Huang, Kun-Yuan Hsieh, Jia-Jhe Li, Jenq-Kuen Lee, EUC 2009, Vancouver, Aug. 29-31, 2009.

  68. PTest: An Adaptive Testing Tool for Concurrent Software on Embedded Multicore Processors, S-W Chang, K-Y Hsieh, and Jenq Kuen Lee, Date 2009, France, April 2009.

  69. Expression Rematerialization for VLIW DSP Processors with Distributed Register File, Chung-Ju Wu, Chia Han Lu, and Jenq-Kuen Lee, CPC 2009, Zurich, Switzerland, Jan. 2009.

  70. Parallelization of Belief Propagation Method on Embedded Multicore Processors for Stereo Vision, Chi-Hua Lai, Kun-Yuan Hsieh, Shang-Hong Lai, Jenq Kuen Lee, ESTIMedia 2008 (Embedded Systems Week 2008), Atlanta, Oct. 19-24, 2008.

  71. Enabling Streaming Remoting on Embedded Dual-core Processors, Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei Chang, Jenq Kuen Lee, ICPP 2008, Portand, Oregon, Sep. 8-12, 2008.

  72. A Local-Conscious Global Register Allocator for VLIW DSP Processors with Distributed Register Files, Chia Han Lu, Young-Jia Lin, Yi-Ping You, Jenq-Kuen Lee, CPC 2007 (Compilers for Parallel Computing 2007), Lisbon, Portugal, July 9-11, 2007.

  73. Enabling Compiler Flow for Embedded VLIW DSP Processors with Distributed Register Files, Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq-Kuen Lee, ACM SIGPLAN/SIGBED 2007 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, June 2007 (3 pages poster paper) (Also in ACM SIGPLAN Notices).

  74. Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files, Chung-Ju Wu, Sheng-Yuan Chen, and Jenq-Kuen Lee, LCPC 2006, USA (Also to appear in LNCS).

  75. Streaming Support for Java RMI in Distributed Environment, C. C. Yang, Chung-Kai Chen, Yu-Hao Chang, Kai-Hsin Chung and Jenq-Kuen Lee, ACM International Conference on Principles and Practices of Programming In Java (PPPJ 2006), Mannheim, Germany, August 30 - September 1, 2006.

  76. Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors, Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-li Shih, S. C. Chen, Chung-Kai Chen, Chien-CHing Huang, Yi-Ping You, Jenq-Kuen Lee, RTCSA 06, Sydney, Aug. 2006 (Invited Paper).

  77. Power Aware H.264/AVC Video Player on PAC Dual-Core SoC Platform, Jia-Ming Chen, Chih-Hao Chang, Shau-Yin Tseng, Jenq-Kuen Lee, Wei-Kuan Shih, 2006 IFIP International Conference on Embedded and Ubiquitous Computing (EUC-06), Aug. 2006 (Also in LNCS 4096, pp.57-68, 2006).

  78. PAC DSP Core and Application Processors, David Chih-Wei Chang, Chien-Wei Jen, I-Tao Liao, Jenq-Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, IEEE International Conference on Multimedia & Expo (ICME), Toronto, July 9-12, 2006.

  79. Register Allocation for VLIW DSP Processors with Irregular Register Files , Yung-Chia Lin, Yi-Ping You and Jenq Kuen Lee, CPC 2006, Spain, Jan. 2006.

  80. Compiler Supports and Optimizations for PAC VLIW DSP Processors , Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen and Jenq Kuen Lee, LCPC 2005, USA, Oct. 2005 (Also to appear in LNCS).

  81. A Sink-N-Hoist Framework for Leakage Power Reduction, Yi-Ping You, Chung-Wen Huang, Jenq-Kuen Lee, ACM EMSOFT 2005, New York, September 2005 (Sponsored by ACM SIGBED).

  82. Efficient Switching Supports of Distributed .NET Remoting with Network Processors, Chung-Kai Chen, Yu-Hao Chang, Cheng-Wei Chen, Yu-Tin Chen, Chih-Chieh Yang, Jenq-Kuen Lee, ICPP 2005, Norway, June 2005.

  83. Architecture-level Simulations with Rapid Power Estimations for Security Processors with Multiple Power Domains, Chung-Wen Huang, Young-Jia Lin, Yi-Ping You, Jenq-Kuen Lee, TingTing Hwang, ASPICES, IEEE Computer Society, 2005.

  84. ORC2DSP: Compiler Infrastructure Supports for VLIW DSP Processors , Cheng-Wei Chen, Yung-Chia Lin, Chung-Ling Tang, Jenq-Kuen Lee, IEEE VLSI TSA, April 27-29, 2005.

  85. System-Level Design Space Exploration for Security Processor Prototyping in Analytical Approaches, Yung-Chia Lin, Chung-Wen Huang, Jenq-Kuen Lee, ASP-DAC, 2005.

  86. Power-aware Scheduling for Parallel Security Processors with Analytical Models , Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq-Kuen Lee, Wei-Kuan Shih, and Ting-Ting Hwang, LCPC '04, West Lafayette, Indiana, USA, Sep. 2004 (Also in LNCS 3602, pp. 470-484, 2005).

  87. Efficient Support of Java RMI over Heterogeneous Wireless Networks, Cheng-Wei Chen, Chung-Kai Chen, Jyh-Cheng Chen, Chien-Tan Ko, Jenq-Kuen Lee, Hong-Wei Lin, Wang-Jer Wu, International Conference on Communications (ICC), Paris, June 2004.

  88. Specification and Architecture Supports for Component Adaptations on Distributed Environments, Chung-Kai Chen, Cheng-Wei Chen, Jenq Kuen Lee, IPDPS 2004, Santa Fe, USA, April 2004.

  89. Compiler Support for Speculative Multithreading Architecture with Probabilistic Points-To Analysis, Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee, ACM Principles and Practices of Parallel Programming (ACM PPoPP), San Diego, 2003.

  90. Support and Optimization of Java RMI over Bluetooth Environments , P. C. Wey, J. S. Chen, Cheng-Wei Chen, Jenq-Kuen Lee, ACM Java Grande Conference, Nov. 2002.

  91. Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors, Yi-Ping You, Ching-Ren Lee, Jenq Kuen Lee, LCPC, USA, July 2002 (Also in LNCS 2481, pp. 45-60).

  92. Compiler Optimizations with DSP-Specific Semantic Descriptions, Young-Jia Lin, Yuan-Shin Hwang, Jenq Kuen Lee, LCPC, USA, July 2002 (Also in LNCS 2481).

  93. Building Ontology for Composition and Optimization of Parallel JavaBean Programs, Cheng-Wei Chen, Chung-Kai Chen, Jenq Kuen Lee, IEEE I-SPAN, May 2002. (Invited Paper).

  94. Probabilistic inference schemes for sparsity structures of Fortran 90 array intrinsics, Rong-Guey Chang, Jia-Shing Li, Tyng-Ruey Chuang, Jenq Kuen Lee, International Conference on Parallel Processing(IEEE Computer Society Press), Spain, Sep. 2001.

  95. Probabilistic Points-to Analysis, Yuan-Shin Hwang, Peng-Sheng Chen, Jenq-Kuen Lee , R. Ju, LCPC 2001, USA (Also in LNCS 2624, pp. 290-305, 2003).

  96. Real-Time Task Scheduling for Dynamically Variable Voltage Processors, Yi-Ping You, Ching-Ren Lee, Jenq-Kuen Lee , Wei-Kuan Shih, IEEE workshop on Power Management for Real-Time and Embedded Systems, May 2001.

  97. Compiler Optimization on Instruction Scheduling for Low power, Ching-Ren Lee, Jenq Kuen Lee, Ting-Ting Hwang, Shi-Chun Tsai, International Symposium on System Synthesis(IEEE Computer Society Sponsor), Madrid, Spain, Sep. 2000.

  98. A bytecode optimizer to engineer bytecodes for performances, by Jian-Zhi Wu, Jenq Kuen Lee, in Languages and compilers for high-performance computing (LCPC '00), 4 pages, August 2000 (Also in LNCS).

  99. Runtime Compositions and Optimizations of Parallel JavaBean Programs on Clustering Environments, by C. W. Chen, C. K. Chen, Jenq Kuen Lee, Proceedings of PDPTA '2000, USA, June 2000.

  100. Performance of Parallel Sparse Supports for Fortran 90 on PC-based Networks of Clusters, by R. G. Chang, X. Y. Jiang, Tyng-Ruey Chuang, Jenq Kuen Lee, in Proceedings of High-Performance Computing 2000, SCS, Washington D. C., April 2000.

  101. Compiler Optimizations for Parallel Sparse Programs with Array Intrinsics of Fortran 90 (IEEE-copyrighted material), Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee, International Conference on Parallel Processing, September 1999.

  102. Efficient Support of Parallel Sparse Computation for Array Intrinsic Functions of Fortran 90, Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee, the 12th ACM International Conference on Supercomputing, ACM SIGARCH, Melbourne, July 13-17, 1998.

  103. Parallelizing Pressure Correction Method on Unstructred Grid, by C. M. Lin, Jenq Kuen Lee, K. L. Wu, C. A. Lin. Parallel CFD '98.

  104. An Expression-Rewriting Framework to Generate Communication Sets for HPF Programs with Block-Cyclic Distribution, by Gwan-Hwan Hwang, Jenq Kuen Lee, IPPS/SPDP, March 30- April 3, Orlando, 1998.

  105. Integrating Automatic Data Alignment and Array Operation Synthesis to Optimize Data Parallel Programs, by Gwan-Hwan Hwang, Jenq Kuen Lee, Dz-Ching Ju, Workshop on Languages and Compilers for Parallel Computing (LCPC '97), August 1997 (Also in LNCS Vol. 1366).

  106. Data Distribution Analysis and Optimization for Pointer-Based Distributed Programs (IEEE-copyrighted material, and the Most Original Paper Award, ICPP '97), by Jenq Kuen Lee, Dan Ho, Yue-Chee Chuang, International Conference on Parallel Processing, IEEE Computer Society, August 1997.

  107. Y. C. Chuang, Jenq Kuen Lee, K. L. Wu, and C. A. Lin. ``Towards the Parallelization of Pressure Correction Method on Unstructured Grids", Parallel CFD '97, Manchester, England, May 19-21, 1997.

  108. Sampling and Analytical Techniques for Data Distribution of Parallel Sparse Computation, by Tyng-Ruey Chuang, Rong-Guey Chang, and Jenq Kuen Lee, in SIAM Conference on Parallel Processing for Scientific Computing, March 1997.

  109. Array Operation Synthesis to Optimize HPF programs(IEEE-copyrighted material), by Gwan-Hwan Hwang, Jenq Kuen Lee, and Dz-Ching Ju, Proceedings of the International Conference on Parallel Processing, IEEE Computer Society Press, August 12-16,1996.

  110. An Array Operation Synthesis Scheme to Optimize Fortran 90 Programs, by Gwan-Hwan Hwang, Jenq Kuen Lee, and Dz-Ching Ju Proceedings of the Fifth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming, Santa Barbara, CA, July 19-21, 1995.

  111. Y. L. Shie, Jenq Kuen Lee, C. A. Lin, and C. H. Tsai, ``Load-Balancing Strategies for Parallel Vortex Methods with Distributed Adaptive Data Structure", Proceedings of Parallel CFD 95, Pasadena, California, USA, May 1995.

  112. Jenq Kuen Lee, Ing-Kuen Tsaur, San-Yih Huang, ``Laguage and Environment Support for Parallel Object I/O on Distributed Memory Environments,'' Proceedings of the 7th SIAM Conference on Parallel Processing for Scientific Computing, Feb. 1995.

  113. Y. L. Shie, Jenq Kuen Lee, C. A. Lin, and C. H. Tsai, ``Parallel Vortex Methods for Three-Dimensionally Evolving Jets on Distributed Memory Machines,'' Proceedings of Parallel CFD, Kyoto, Japan, May 1994.

  114. J. Sang, F. Knop, V. Rego, Jenq Kuen Lee, and C-T King. ``The Xthreads Library: Design, Implementation, and Applications,'' COMPSAC 93, November 1993.

  115. Jenq Kuen Lee, Y. Chen, C. Lin, M. Lu, ``Modelling Three-Dimensional Gas-Turbine-Combustor-Model Flow on Parallel Machines with Distributed Memory,'' Parallel CFD '93, Paris, May 1993.

  116. Jenq-Kuen Lee, Shelby Yang, S. Srinivas, Dennis Gannon, ``Compiling an Object-Oriented Language for Parallel Machines,'' Proceedings of International Conference on Parallel and Distributed Systems, Taiwan, Dec. 1992.

  117. Dennis Gannon, Jenq Kuen Lee, and S. Narayana, ``On Using Object-Oriented Parallel Programming to Build Distributed Algebraic Abstractions,'' CONPAR92 - VAPP V, September, 1992 (also in LNCS 634).

  118. Dennis Gannon, Jenq Kuen Lee, Bruce Shei, Sekhar Sarukkai, S. Narayan, N. Sundaresan, Daya Atapatta, Francois Bodin, ``SIGMA II: A Tool Kit for Building Parallelizing Compilers and Performance Analysis Systems,'' Proceedings of Programming Environments for Parallel Computing Conference, Edinburgh, 6-8 April, 1992.

  119. Shelby X. Yang, Jenq Kuen Lee, Srinivas P. Narayana, and Dennis Gannon, ``Programming an Astrophysics Application in an Object-Oriented Parallel Language,'' Proceedings of Scalable High Performance Computing Conference, Williamsburg, VA, April 26-29, 1992.

  120. Object-Oriented Parallel Programming: Experiments and Results, by Jenq Kuen Lee and Dennis Gannon Proceedings of Supercomputing '91, New Mexico, November, 1991.

  121. Dennis Gannon and Jenq Kuen Lee, ``Object-Oriented Parallelism: PC++ Ideas and Experiments,'' Joint Symposium on Parallel Processing '91, Kobe, Japan, May 14-16, 1991.

  122. Dennis Gannon, Vincent Guarna, and Jenq Kuen Lee, ``Static Analysis and Runtime Support for Parallel Execution of C,'' The Second Workshop on Languages and Compilers for Parallel Computing, Urbana, Illinois, Aug. 1989.

  123. Dennis Gannon, Bruce Shei, Daya Atapattu, Jenq Kuen Lee, Mannho Lee, Kyle Gallivan, William Jalby, and Harry Wijshoff, ``Programming Environments for Parallel Computation: Performance Debugging of Parallel Algorithms,'' In Proceedings of the International Workshop on Parallel and Distributed Computing, Bonas, France, October 1988.

  124. Dennis Gannon, Daya Atapattu, Mann Ho Lee, Bruce Shei, Atul Saini, and Jenq Kuen Lee, ``The Sigma System: A Tool for Parallel Program Design,'' Proceedings of the Third International Conference on Supercomputing (ICS '88), St. Petersberg, FL, v2, pp.157-163, 1988.

C. Patents

  1. Jenq Kuen Lee, Chung-Kai Chen, Peng-Sheng Chen, Ming-Jer Tsai, "An Optimization Technique of Object-Oriented Programs on the Hardware Architecture with a Fast Device for the Access of Activation Records", ROC Patent, No. 090111864, 2002.

  2. Jenq Kuen Lee, Yi-Ping You, Ching-Ren Lee, "Component-Activity Data-Flow Equation in Compiler for Low Power Instruction Sets", ROC Patent, No. 090115630, 2003.

  3. Chi Wu, Yi-Ping You, and Jenq-Kuen Lee, "Compiler Approach to Perform Variable Voltage Scheduling for Components,'' ROC Patent No. I221227, Issued Date: 2004/09/21.

  4. Y. C. Lin, Y. P. You, C. W. Huang, Jenq Kuen Lee "Iterative Scheduling Mechanism for Low-Power on Embedded Devices," Taiwan Patent, No. I251171, 2005.

  5. Y. C. Lin, Y. P. You, C. W. Huang, Jenq Kuen Lee "Iterative Scheduling Mechanism for Low-Power on Embedded Devices," Pending Patent (USA/German).

  6. Jenq-Kuen Lee, Jyh-Cheng Chen, Cheng-Wei Chen, Chung-Kai Chen, "Method and System for Providing Roaming of Remote Object Procedure Call in Heterogeneous Wireless Network Environment," Pending Patent(Taiwan/USA).

  7. Jenq-Kuen Lee, Yi-Ping You, Chung-Wen Huang, "Processor employing a power managing mechanism and method of saving power for the same," Pending Patent(Taiwan/USA).

  8. Jenq-Kuen Lee, et al, "Power-gating control placement for leakage power," Pending Patent(Taiwan/USA).

  9. Jenq-Kuen Lee, Chung-Ling Tang, Yong-Jia Lin, "Method for Scheduling Instructions and Method for Allocating Registers Using the Same," Pending Patent(Taiwan/USA).

  10. Jenq-Kuen Lee, Chung-Kai Chen, Yow-How Chang, "SCHEDULING METHOD FOR REMOTE OBJECT PROCEDURE CALL AND SYSTEM THEREOF," Pending Patent(Taiwan/USA).

  11. Jenq-Kuen Lee, Young-Jia Lin, Yi-Ping You, "System and Method for Register Allocations for Irregular Register Files," Pending Patent(Taiwan/USA).

  12. Jenq-Kuen Lee, Jason Wu, Sheng-Yuan Chen, "Method for Copy Propagations for a Processor," Pending Patent(Taiwan/USA).

  13. Jenq-Kuen Lee, Kuen-Yuan Shieh, Young-Jia Lin, et al, "System and method of optimizing multi-set context switch for embedded processors," Pending Patent(USA).

  14. Jenq-Kuen Lee, Kuen-Yuan Shieh, Young-Jia Lin, et al, "System and method of optimizing multi-set context switch for embedded processors," Pending Patent(USA).

D. Awards

  1. Received the Most Original Paper Award in ICPP (USA), August 1997.

  2. Received Taiwan MOE award for the achievements in Univ. and industrial joint research projects (topics: Compilers for PDAs), 2000-2001.

  3. Received Taiwan NSC research awards, 1992, 1993, 1995-2000.

  4. The dissertation of his supervised Ph.D. student, Gwan-Hwan Hwang, received a distinguished dissertation award (as honorable mention) from Taiwan Computer Science Society (IICM), 1999.

  5. The dissertation of his supervised MS student, Yi-Ping You, received a MS dissertation award from Taiwan Computer Science Society (IICM), 2002.

  6. The dissertation of his supervised MS student, Chi Wu, received a MS dissertation award from NTHU EECS school, 2003.

  7. Received Microsoft research excellence award for embedded systems, Redmond, 2003.

  8. The dissertation of his supervised MS student, Ming-Yu Hung, received a MS dissertation award from NTHU EECS school, 2004.

  9. The dissertation of his supervised MS student, C. C. Yang, received a MS dissertation award from Taiwan Computer Science Society (IICM), 2006.

  10. The dissertation of his supervised MS student, C. C. Huang, received a MS dissertation award from Taiwan Computer Science Society (IICM), 2007.

  11. The dissertation of his supervised Ph.D student, Yi-Ping You, received a Ph.D. dissertation award from Taiwan Computer Science Society (IICM), 2007.

  12. The dissertation of his supervised Ph.D student, Kun-Yuan Shieh, received a Ph.D. dissertation award from Taiwan Computer Science Society (IICM), 2010.

  13. The dissertation of his supervised MS student, Po-Yu Chen. received a MS dissertation award from Taiwan Computer Science Society (IICM), 2011.