前瞻高效能低耗能之雙處理器系統技術研發三年計畫研討會
Workshop on Compilers for Low-Power and Embedded Systems
時 間:中華民國九十五年一月四日(星期三)
地 點:國立清華大學第二綜合大樓8F國際會議廳
主辦單位:國立清華大學積體電路設計技術研發中心
經濟部學界開發產業技術計畫「前瞻高效能低耗能之雙處理器系統技術研發」
協辦單位:工業技術研究院系統晶片技術發展中心、台灣SoC推動聯盟、清華大學資訊工程學系、
交通大學電子與資訊研究中心
大會主席:國立清華大學
資工系 李政崑教授
議程主席:國立清華大學 資工系 黃婷婷教授
Agenda
Time |
Session | Topic |
Speaker |
Session Chairman |
8:50-9:20 |
Registration | |||
9:20-9:30 |
Opening(工研院STC 張志偉副主任) | |||
9:30-10:30 |
1st session |
Reliability
Optimizations for
Embedded Systems |
Prof. Mahmut
Kandemir |
工研院STC 張志偉副主任 |
10:30-11:00 |
Coffee
Break | |||
11:00-12:00 |
2nd session |
Compiler-Based NoC Power Management |
Prof. Mahmut
Kandemir |
交大資科系
陳俊穎教授 |
12:20-14:00 |
Lunch
Break | |||
14:00-15:00 |
3rd
session |
Software
Optimizations for
Embedded Java Based Systems |
Prof. Mahmut
Kandemir |
交大顯示科技 鄭惟中教授 |
15:00-15:30 |
Coffee
Break | |||
15:30-16:30 |
4th session |
Compiler Optimizations for Embedded Systems |
Prof. Mahmut
Kandemir |
清大資工系 |
費用:1.12月30日以前報名及繳費:學生300元;教師、工研院、SoC聯盟會員500元;其他1,500元。 |
2.12月30日以後報名及繳費:學生400元、教師、工研院、SoC聯盟會員700元;其他1,800元。 |
(以上費用包含講義、餐盒、茶點) |
諮詢專線:(03)5742300、5742311 FAX:(03)5745594 |
網路報名:http://pllab.cs.nthu.edu.tw/moeapac/20060104workshop.htm |
名額共130位[12月30日(五)截止網路報名] |
繳費方式:報名費請于12月30日報名截止日期之前,以郵局匯票或支票(僅接受即期支票)方式寄達 |
【匯票戶名:國立清華大學 支票戶名:國立清華大學】 |
地址:30013 新竹市光復路二段101號 清華大學積體電路中心 曾雯姬小姐 收 |
Abstract
1. Software-Directed Energy Optimization
for Embedded NoC Architectures
Network-on-Chip (NoC) based systems
are becoming increasingly popular due to scalability and flexibity they bring.
In this talk, I will present the work going on at Penn State in reducing energy
consumption of NoCs under compiler control. The specific techniques I will
discuss include link shutdown,link voltage/frequency scaling, and link reuse. I
will also discuss the experimental results that compare the compiler-directed
methods to pure hardware-based ones.
2.Compiler-Directed Solutions to Transient Hardware Errors
Ever-scaling process technology combined
with heavily used power reducing techniques results in an increase in transient
hardware errors. While circuit techniques and architectural mechanisms are
critical to cope with these errors, software can be more effective and flexible
in resource constrained embedded systems. I will present an overview of the
compiler-directed reliability work being done at Penn State and discuss
important issues that need to be tackled in the future.
About the Speakers
Prof. Mahmut Kandemir
Mahmut Kandemir is an
associate professor in the Computer Science and Engineering Department at the
Pennsylvania State University. His main research interests are optimizing
compilers, I/O intensive applications, and power-aware computing. He received
the B.Sc. and M.Sc. degrees in control and computer engineering from
Istanbul Technical University, Istanbul, Turkey, in 1988 and 1992, respectively.
He received the Ph.D. from Syracuse University, Syracuse, New York in electrical
engineering and computer science, in 1999. His research is funded by NSF, DARPA,
GSRC, PDG, and SRC.